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Bug 1588714 - Implement CheckARMSupport for Win64/aarch64. r=kjacobs
aarch64 doesn't have `cpuid` like instruction set. Actually, we use getauxval system call on Linux/aarch64 to check CPU features.

Windows has `IsProcessorFeaturePresent` API to get CPU features, so we should use it to check whether current CPU supports ARM Crypto extension.

Differential Revision: https://phabricator.services.mozilla.com/D55270

--HG--
extra : moz-landing-system : lando
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makotokato committed Dec 12, 2019
1 parent 7c5abde commit 7f5a021
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Showing 4 changed files with 22 additions and 3 deletions.
12 changes: 12 additions & 0 deletions lib/freebl/blinit.c
Expand Up @@ -17,6 +17,10 @@
#include <intrin.h> /* for _xgetbv() */
#endif

#if defined(_WIN64) && defined(__aarch64__)
#include <windows.h>
#endif

static PRCallOnceType coFreeblInit;

/* State variables. */
Expand Down Expand Up @@ -149,13 +153,21 @@ CheckARMSupport()
char *disable_arm_neon = PR_GetEnvSecure("NSS_DISABLE_ARM_NEON");
char *disable_hw_aes = PR_GetEnvSecure("NSS_DISABLE_HW_AES");
char *disable_pmull = PR_GetEnvSecure("NSS_DISABLE_PMULL");
#if defined(_WIN64)
BOOL arm_crypto_support = IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE);
arm_aes_support_ = arm_crypto_support && disable_hw_aes == NULL;
arm_pmull_support_ = arm_crypto_support && disable_pmull == NULL;
arm_sha1_support_ = arm_crypto_support;
arm_sha2_support_ = arm_crypto_support;
#else
if (getauxval) {
long hwcaps = getauxval(AT_HWCAP);
arm_aes_support_ = hwcaps & HWCAP_AES && disable_hw_aes == NULL;
arm_pmull_support_ = hwcaps & HWCAP_PMULL && disable_pmull == NULL;
arm_sha1_support_ = hwcaps & HWCAP_SHA1;
arm_sha2_support_ = hwcaps & HWCAP_SHA2;
}
#endif
/* aarch64 must support NEON. */
arm_neon_support_ = disable_arm_neon == NULL;
}
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4 changes: 3 additions & 1 deletion lib/freebl/ctr.c
Expand Up @@ -13,7 +13,9 @@
#include "secerr.h"

#ifdef USE_HW_AES
#ifdef NSS_X86_OR_X64
#include "intel-aes.h"
#endif
#include "rijndael.h"
#endif

Expand Down Expand Up @@ -207,7 +209,7 @@ CTR_Update(CTRContext *ctr, unsigned char *outbuf,
return SECSuccess;
}

#if defined(USE_HW_AES) && defined(_MSC_VER)
#if defined(USE_HW_AES) && defined(_MSC_VER) && defined(NSS_X86_OR_X64)
SECStatus
CTR_Update_HW_AES(CTRContext *ctr, unsigned char *outbuf,
unsigned int *outlen, unsigned int maxout,
Expand Down
7 changes: 6 additions & 1 deletion lib/freebl/freebl.gyp
Expand Up @@ -349,7 +349,7 @@
'intel-gcm-wrap_c_lib',
],
}],
[ 'OS=="win" and cc_is_clang==1', {
[ 'OS=="win" and (target_arch=="ia32" or target_arch=="x64") and cc_is_clang==1', {
'dependencies': [
'intel-gcm-wrap_c_lib',
],
Expand Down Expand Up @@ -482,6 +482,11 @@
},
},
}],
[ 'OS=="win" and (target_arch=="arm64" or target_arch=="aarch64") and disable_arm_hw_aes==0', {
'defines': [
'USE_HW_AES',
],
}],
[ 'cc_use_gnu_ld==1 and OS=="win" and target_arch=="x64"', {
# mingw x64
'defines': [
Expand Down
2 changes: 1 addition & 1 deletion lib/freebl/rijndael.c
Expand Up @@ -989,7 +989,7 @@ AES_InitContext(AESContext *cx, const unsigned char *key, unsigned int keysize,
break;
case NSS_AES_CTR:
cx->worker_cx = CTR_CreateContext(cx, cx->worker, iv);
#if defined(USE_HW_AES) && defined(_MSC_VER)
#if defined(USE_HW_AES) && defined(_MSC_VER) && defined(NSS_X86_OR_X64)
if (aesni_support() && (keysize % 8) == 0) {
cx->worker = (freeblCipherFunc)CTR_Update_HW_AES;
} else
Expand Down

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