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Disable AVX/SSE4.1 manually
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Signed-off-by: Carsten Munk <carsten.munk@jollamobile.com>
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Carsten Munk committed Feb 13, 2013
1 parent e8bd596 commit 7b07436
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4 changes: 4 additions & 0 deletions llvm.changes
@@ -1,3 +1,7 @@
* Wed Feb 13 2013 Carsten Munk <carsten.munk@jollamobile.com> - 3.1
- Add patch to disable AVX/SSE4.1 currently. There's a bug in VirtualBox that causes improper CPUID to leak
through. AVX isn't supported by VirtualBox so this causes SIGILL.

* Tue Jan 22 2013 Oleg Girko <ol+mer@infoserver.ru> - 3.1
- Add workaround to fix building llvm with scratchbox2.

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3 changes: 2 additions & 1 deletion llvm.spec
Expand Up @@ -7,6 +7,7 @@ Group: Development/Tools
URL: http://llvm.org/
Source: http://llvm.org/releases/%{version}/%{name}-%{version}.src.tar.gz
Patch0: llvm-3.1-sb2-build-workaround.patch
Patch1: nosse4-avx.patch
Requires(post): /sbin/ldconfig
Requires(postun): /sbin/ldconfig
BuildRequires: gcc >= 3.4, python
Expand All @@ -32,7 +33,7 @@ LLVM Header files
%prep
%setup -q -n llvm-3.1.src
%patch0 -p1

%patch1 -p1
%build
./configure \
--prefix=%{_prefix} \
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32 changes: 32 additions & 0 deletions nosse4-avx.patch
@@ -0,0 +1,32 @@
diff -ru llvm-3.1.src/lib/Target/X86/X86Subtarget.cpp llvm-3.1.src-noavxsse4/lib/Target/X86/X86Subtarget.cpp
--- llvm-3.1.src/lib/Target/X86/X86Subtarget.cpp 2012-06-12 14:35:17.000000000 +0200
+++ llvm-3.1.src-noavxsse4/lib/Target/X86/X86Subtarget.cpp 2013-02-13 14:01:46.918216857 +0100
@@ -194,10 +194,11 @@
if ((EDX >> 26) & 1) { X86SSELevel = SSE2; ToggleFeature(X86::FeatureSSE2); }
if (ECX & 0x1) { X86SSELevel = SSE3; ToggleFeature(X86::FeatureSSE3); }
if ((ECX >> 9) & 1) { X86SSELevel = SSSE3; ToggleFeature(X86::FeatureSSSE3);}
+#if 0
if ((ECX >> 19) & 1) { X86SSELevel = SSE41; ToggleFeature(X86::FeatureSSE41);}
if ((ECX >> 20) & 1) { X86SSELevel = SSE42; ToggleFeature(X86::FeatureSSE42);}
if ((ECX >> 28) & 1) { X86SSELevel = AVX; ToggleFeature(X86::FeatureAVX); }
-
+#endif
bool IsIntel = memcmp(text.c, "GenuineIntel", 12) == 0;
bool IsAMD = !IsIntel && memcmp(text.c, "AuthenticAMD", 12) == 0;

@@ -301,6 +302,7 @@
HasBMI = true;
ToggleFeature(X86::FeatureBMI);
}
+#if 0
if (IsIntel && ((EBX >> 5) & 0x1)) {
X86SSELevel = AVX2;
ToggleFeature(X86::FeatureAVX2);
@@ -309,6 +311,7 @@
HasBMI2 = true;
ToggleFeature(X86::FeatureBMI2);
}
+#endif
}
}
}

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